NAND flash memories, especially MLC (Multi Level Cell) NAND Flash use the spare region to in order to solve reliability problems with high bit error rate. Spare region may include Error Correction Code (ECC) and redundant column which can replace at least error bit cell. In case of MLC NAND Flash, while the memory becomes high capacity such like 3 bits or 4 bits per cell, the bit error rate may be increased. Thus, the memory needs more space region, and the main region capability may be reduced. In case that the error bits which may not be solved with ECC or redundant column, a block having the error may be registered as a bad block. The bad block will not be used any more. Therefore the storage capacity of MLC NAND flash may be reduced.